SmarCo-1 chip ——Godson-T thousands billions of single-chip many-core processors

Godson-T A prototype chip

Godson-T Prototype chip validates 16 cores’ key technology

Using 0.13um process design, an area of 230mm²

Features:

Ø  One chip with 64 dual-issue cores connected by an 8x8 mesh network

Ø  Configurable on-chip memory that can be either SPM or data cache

Ø  Fast task creation & termination within tens of cycles

Ø  Fast locks and barriers enabled by a synchronization manager node

Ø  Fast memory access enabled by software managed SPM

Ø  Fine grain synchronization enabled by Full/Empty bits with SPM

Ø  Memory wall break via asynchronous memory access enabled by DTAs

Ø  Efficient inter-core communication enabled by row/column broadcasting